Backside Power Delivery: Samsung is also using a new power supply from 2 nm

In addition to Gate-All-Around (GAA), it is one of the major innovations to come: Backside Power Delivery. All three industry giants rely on the new power supply for the transistors, Intel's announcement was the first to be made, and in the spring TSMC confirmed its use in the middle of the decade. Now Samsung follows.

From the front to the back

The topic of Backside Power Delivery (BPD), i.e. the power supply not traditionally from the front or from “above” but from the rear, has recently become more of a focus. The reason is quite obvious: Almost every manufacturer is currently looking for salvation in stacking chips, i.e. the transition from previous chips primarily placed next to each other to the third dimension. But there are many limitations, one of which is the power supply to the chips and possible interference and other problems that arise from it.

Backside Power Delivery is an important topic (Image: Applied Materials)

Backside Power Delivery could address some of these issues and even open up opportunities for new concepts. Different gradations are also considered, from the cheapest variant to the very complex and most expensive solutions – there is not just one approach. Another positive side effect is that it helps with scaling, in the end the overall construct becomes much more efficient.

Frontside Power Distribution has its limits (Image: Applied Materials)

Intel wants to use it first

All large companies have recognized this since the basic research published by the Belgian research institute imec in 2019 at the latest and are taking a corresponding path, because without such a solution it will be difficult to remain competitive. Intel went on the offensive more than a year ago and announced the introduction of PowerVIA for 2024. As usual, Intel loves to use their own marketing terms for standard technologies, but in the end it's nothing more than their version of Backside Power Delivery.

PowerVia is Intel's unique, industry-first implementation of backside power delivery – eliminating the need for power routing on the front side of the wafer and providing optimized signal routing while reducing droop and lowering noise.

Intel

Industry giant TSMC is more cautious about the issue. However, the world's largest contract manufacturer confirmed for the first time in the spring at its Technology Symposium that research is also being carried out on this technology and its implementation. It is used from the GAA production, but not right at the beginning, but only in the generations that follow. At TSMC, this is likely to end in 2026, while Intel is already aiming for its introduction in 2024.

Samsung is now the third force in the league and was ultimately under pressure to take a stand as well. At SEDEX 2022 last week, Samsung presented its first approaches, which of course go in the same direction. Here figures are given that speak of up to 44 percent more performance and a 30 percent increase in efficiency when used in a 2 nm process. What the comparison basis is, however, is not clear from the short report at The Elec. Since Samsung is targeting 2nm production by the end of 2025, all three foundries could be using the same technologies again in 2026.