Penta-Level Cell: Solidigm demonstrates first SSD with 5 bits per cell

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Solidigm, the new brand behind the SSD business sold by Intel to SK Hynix, demonstrated the prototype of an SSD with a very special memory at the Flash Memory Summit 2022: The SSD is based on NAND for the first time -Flash with 5 bits per memory cell (Peta Level Cell, PLC). It remains to be seen when it will hit the market.

“We are excited to show the industry's first PLC SSD in action today,” said Sanjay Talreja, SVP and General Manager of Solidigm's Client Storage Group. “It's an important milestone for Solidigm as a new company and an exciting moment for the future of storage technology with far-reaching implications”.

The higher storage capacity should reduce the need for space and energy in the data center and reduce costs. Because according to Solidigm, the PLCs-SSDs could replace HDDs in data centers, which currently still contain 85 percent of all data. Although HDDs are much slower than SSDs and require more space and energy, they still far outperform SSDs when it comes to price per terabyte.

  • Data intensive needs of modern workloads such as AI, machine learning (ML) and big data analytics
  • Building out of 5G infrastructure where faster, denser storage is needed
  • Displacement of hard disk drives (HDDs), on which more than 85% of all data center data is still stored.
Solidigm

Another bit is not so easy

After SLC with 1 bit, MLC with 2 bits, TLC with 3 bits and QLC with 4 bits per memory cell, PLC is the next logical step to accommodate even more data in a cell. However, the ratio of the gain in bit density to the complexity of the storage process is getting worse.

1 bit (SLC) 2 bit (MLC) 3 bit (TLC) 4 bit (QLC) 5 bit (PLC) Delta memory capacity – +100% +50% +33 % +25% Delta States/Complexity – +100% +100% +100% +100%

Compared to QLC-NAND with 4 bits, the storage capacity still increases by 25 percent, but the number of voltage states that can be distinguished within the cell is doubled again. For example, 32 statuses must be differentiated with PLC instead of 16 with QLC. The storage process is thus far more complex and error-prone than with QLC-NAND. The more voltage levels that have to be differentiated, the more the controllers or engines have to do with error correction. This potentially makes PLC a notch slower and less durable than QLC.

So a NAND cell stores x bits from 1 bit (SLC) 2 bits (MLC) 3 bits (TLC) 4 bits (QLC) 5 bits (PLC) Required voltage states 21 22 23 24 25 1 0 0 0 0 0 0 0 0 0 0 00000 2 1 0 1 0 0 1 0 0 0 1 00001 3 – 1 0 0 1 1 0 0 1 1 00010 4 – 1 1 1 1 1 0 1 1 1 00011 5 – – 1 0 0 1 1 1 1 00100 6 – – 1 1 0 1 0 0 0 00101 7 – – 0 1 0 1 1 0 0 00110 8 – – 1 0 1 1 1 1 0 00111 9 – – – 1 0 0 1 01000 10 – – – 0 1 1 0 01001 11 – – – 1 1 0 1 01010 12 – – – 1 0 1 1 01011 13 – – – 0 1 0 0 01100 14 – – – 0 0 1 0 01101 15 – – – 0 1 0 1 01110 16 – – – 1 0 1 0 01111 17 – – – – 10000 18 – – – – 10001 19 – – – – 10010 20 – – – – 10011 21 – – – – 10100 22 – – – – 10101 23 – – – – 10110 24 – – – – 10111 25 – – – – 11000 26 – – – – 11001 27 – – – – 11010 28 – – – – 11011 29 – – – – 11100 30 – – – – 11101 31 – – – – 11110 32 – – – – 11111

Floating gate architecture is predestined for PLC

Intel was the only NAND manufacturer to stick to a floating gate design (FG) for the memory cells, while all others, including ex-partner Micron, rely on the charge trap flash (CTF) principle. However, Intel and now Solidigm see FG memory cells as an advantage in order to realize PLC-NAND. New production methods are also not necessary.

Solidigm believes floating gate cell design delivers strong charge isolation and very good voltage threshold distribution, making it well suited for “high” bit/cell scaling. Additionally, Solidigm will be able to efficiently scale to PLC because the technology can be manufactured on the same equipment used for QLC NAND manufacturing.

Solidigm

Kioxia tries halved cells

Kioxia is also considering switching to a floating gate design for PLC-NAND and has a new concept in mind with “cells cut in half”: Compared to the previous BiCS flash with circular charge trap cells (CT), Kioxia wants semicircular ones Utilize floating gate (FG) cells. The new structure aims to increase the window for programming the cell, although the cells are even smaller than the previous CT cells.

When will it come PLC to market?

Solidigm appears to be a step further, but leaves it completely open as to when the company's PLC SSDs will hit the market. The only thing that is clear is that data centers will initially be served.

Last year, Kioxia's development partner Western Digital got carried away with a rough forecast for PLC-NAND. According to Western Digital's chief technology officer, PLC is not expected before 2026. Solidigm could anticipate that date with Intel's legacy.