In the framework of a project called Corona works HP on a chip with 256 cores that optically communicate with each other at a rate of 20 terabytes per second. The manufacturer aims in 2017, the first chip on 16nm production.
Corona is according to the research paper a three-dimensional stacked manycore architecture that optical interconnects used for communication between the cores, and for the connection with the memory and input/output components. The floating point performance is 10 teraflops. A photonic crossbar would the 256 efficient cores interconnected with a bandwidth of 20 terabyte to connect, and the connection to the memory would be a bandwidth of 10 terabytes per second represent.
The scientists at HP Labs have a Corona system with 1024 threads that is simulated and the Splash-2 benchmark turned in. The results show that such a system, an optical crossbar for the core connections and an optical connection to memory, two to six times better performance in memory-intensive applications than the systems who only of electrical interconnects is available at a much lower fuel consumption.
The scientists still have the necessary time to the Corona architecture to improve; they aim at actual production in 2017. That would be on the 16nm process should happen. At Wired tells Marco Fiorentino, HP Labs that the architecture should lead to exascale-supercomputers that are one hundred times more powerful than the fastest high performance computing systems of today.
